There is a clear trend in the electronics industry for integration, allowing for more compact and efficient designs. More and more, electronics manufacturers are making their chips smaller, including more components within their chips and extending the feature range. This can be seen in highly integrated microcontrollers (with the introduction of SiP, System-in-Package), massive functionality FPGAs or multi-domain switching power supplies (PMIC, Power Management Integrated Controller).

While this integration helps in reducing the footprint of new designs, it comes with the false assumption that designs will work out-of-the-box. An often overlooked (albeit classical) problem in electronics is the power sequencing, or how to power-up (and down, in some cases) your design to avoid running into issues.

What is power sequencing and how does it work?

Power sequencing, in essence, means having a controlled sequence of the different power supplies within a PBA (Printed Board Assembly) or system. It is very seldom that a design has a unique power supply. A lot of Integrated Circuits (ICs) have more than one power supply, e.g. one for digital and one for analog, or one for Input-Output (IOs) and one for core, etc.

Manufacturers of ICs normally give specific ratings or instructions on how to do this power sequencing. Let’s take a look at this excerpt from a microcontroller datasheet:

Source: Low power microcontroller datasheet

In this case, there are two main groups, that must be sequenced with very specific requirements.

This can be accomplished in several ways:

• Chaining the output of DC-DCs with built-in functionality. Often, DC-DCs have a specific ENABLE pin that can be used as the input for secondary stages, tied to the primary stage’s voltage or Power-Good signal. This is often the simplest approach in cases where the power sequencing requirements are simple or not too restrictive.
• Using ad-hoc circuitry, being it purely analog (with transistors, comparators, etc.) or having logics integrated (by the use of a CPLD or FPGA). This more complex approach is used in hot-swap/cold-sparing designs, often in space or mission-critical designs.

The problems derived from wrong power sequencing

As stated in the introduction of this post, this topic is often overlooked by novice designers.

When done incorrectly, the typical problem is that parts of the PBA or system are receiving voltages in areas that are still powered off. This can cause damages (exceeding maximum ratings), false detection of digital states (digital circuitry interpreting a low voltage as a digital high signal) or other problems related with digital electronics.

These problems can be categorized in two:

• Systematic problems: these problems will always appear and can be easily spotted during the initialization of early prototypes. These failures become obvious to the engineer, as for example the microcontroller not booting up, an IC is burnt, etc. These problems always need a redesign.
• Non-systematic problems: these appear apparently randomly, and can be dependent on many factors; temperature, residual power, or even unit-to-unit tolerances. In some occasions, repeatedly forcing a part beyond its rated limits can lead to early failures, causing a very reduced Mean Time Between Failures (MTBF). These problems can most of the times be spotted with a proper Design Verification Testing – DVT, or in the worst-case scenario, during pilot manufacturing runs.

The best mitigation for these problems is carried out during the design phases. It is of paramount importance to:

• Have a clear list of all the power-sequencing requirements at component, board and sub-system levels.
• Perform adequate simulations. Modern tools like LTSpice are easily parametrized, and it is always a good-practice to include noise in simulations, to perform advanced analysis (Monte-Carlo, Worst-Case, etc.).
• Build early mockups whenever possible. Nowadays most ICs have evaluation boards that allow testing of different design ideas.

Conclusion – Be aware of power sequencing!

A good power sequencing starts in the early design stages. It is important for the engineers to keep this concept in mind all the times, allocate some time slots during design phases (e.g.  to carry out specific simulations), and of course having a specific section during DVT for early-detection of any power sequencing-related issue. Also, market surveillance is key for detecting potential problems, via customer feedback.

Teldat is well-aware of the problems derived from incorrect power-sequencing. While the systematic problems can be solved with a redesign, it often increases the Time-to-Market, whereas the non-systematic ones can be perceived by the end-customer, developing into a feeling of unreliability.

Teldat devices are carefully designed, taking into account all the internal requirements, subsequently modeled and simulated, and finally thoroughly tested in a variety of conditions. Also, as no design is perfect, customer feedback is always shared with the R&D Hardware group for continuous learning and improvement.

This awareness and good design practices have led Teldat to being known for its high-reliability equipment, with extended MTBF while maintaining a reduced time-to-market, bringing innovative design to the market.